[RESOLVED] IEEE-1588

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hugh@courtyard.co.uk
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[RESOLVED] IEEE-1588

Post by hugh@courtyard.co.uk » Wed Jan 23, 2019 1:45 pm

We have experience with the iMX6 implementation of IEEE-1588 time stamping.
It is pretty brain damaged but it works.
Critical to our application is to be able to provide a very stable clock to the 1588 hardware counter. Often a 125MHz clock derived from a rubidium source.
Q1: What is the clock that is used by 1588 hardware counter.
Q2: Is this clock available on the 4Kopen board?
Also critical is the ability to monitor the one-pulse-per-second (1pps) rollover point of the 1588 counter.
The full 1588 counter is 48-bits of seconds and 32-bits for nanoseconds. In many applications the seconds part is implemented in software but the nanoseconds part must be hardware.
Q3: How many bits of counter are implemented in hardware?
Q4: What provision is made to monitor the rollover point? Generally both an interrupt and a GPIO pulse are required. The GPIO pulse goes into an FPGA and the PTP software stack uses the interrupt.

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Pete
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Re: IEEE-1588

Post by Pete » Wed Jan 23, 2019 3:59 pm

> Q1: What is the clock that is used by 1588 hardware counter.

From the code I would say 215MHz, though it's converted based into one of two values:

/* Convert the ptp_clock to nano second
* formula = (1/ptp_clock) * 1000000000
* where, ptp_clock = 50MHz.
*/
data = (1000000000ULL / 50000000);

/* 0.465ns accuracy */
if (!(value & PTP_TCR_TSCTRLSSR))
data = (data * 1000) / 465;

writel(data, ioaddr + PTP_SSIR);

> Q2: Is this clock available on the 4Kopen board?

I believe we can map it out to the clock observation pin which is one of 12, 16, 24, 32, 38 and pin 40 on the 40 pin connector, though a 215MHz clock outputted is likely not to be a very good signal at board level, I'm sure we could divide it down, by 2 or 4 to get a cleaner signal on the board. (NB. Anything above 100MHz going out to a pin is likey not to be usable from a relability metastability point of view).

>Also critical is the ability to monitor the one-pulse-per-second (1pps) rollover point of the 1588 counter.
>The full 1588 counter is 48-bits of seconds and 32-bits for nanoseconds. In many applications the seconds part is implemented in software but the >nanoseconds part must be hardware.

Again look in linux-3.10.92/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c and stmmac_ptp.c, it would seem the 32bits is in hardware and the roll over is handled by software.

> Q3: How many bits of counter are implemented in hardware?

Looks like at least 32 bits, though however note, we can take the clock line and place it inside another 64 bit counter as well.

> Q4: What provision is made to monitor the rollover point? Generally both an interrupt and a GPIO pulse are required. The GPIO pulse goes into an FPGA and the PTP software stack uses the interrupt.

This is all handled by the driver by the looks of it, there is no FPGA in this design so no need to send the signal externally, though it may be possible.


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